NCP1603D100R2G【PDF 25/30 页】IC CTLR PFC/PWM COMBO 16-SOIC

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Sheet目录45

21页 22页 23页 24页 [25页]26页 27页 28页 29页

NCP1603

http://onsemi.com

It is obvious that the I

L(ZCD)

is not always zero. In order

to make it reasonably close to zero, the setting of R

and

CS1

are crucial.

Figure 65. CS Pin Characteristic when I

= 0

S(ZCD)

> R

S(ZCD)

= R

S(ZCD)

Operating ZCD point

Ideal ZCD point

Based on the CS pin (Pin 4) characteristics in Figure 35,

Figure 65 is studied here. When the inductor current is

exactly zero (i.e., I

L(ZCD)

= 0), the ideal ZCD point in the

Figure 65 is reached where R

is R

S(ZCD)

(536 W typical).

Considering the tolerance, the actual sense resistor R

needed to be higher than the ideal value of R

S(ZCD)

ensure that zero current signal is generated when sense

current is smaller than the ZCD threshold (i.e., I

S(ZCD)

). That is,

u R

S(ZCD)

(eq. 22)

The higher value of R

makes the bigger distance

between the operating and ideal ZCD points in Figure 65.

Hence, R

has to be as low value as possible. The best

recommended value of R

is therefore the maximum of

S(ZCD)

that is 1.0 kW.

Now that the R

is set at a particular value that is greater

than R

S(ZCD)

. From Equation 20, the operating lines in

Equation 23 with different inductor currents I

Equation 20 are studied.

+ R

* R

CS1

(eq. 23)

These operating lines are added in Figure 65 to formulate

Figure 66. When the inductor current I

is smaller than

L(ZCD)

, the sense current I

is smaller than I

S(ZCD)

and

hence the zero current signal is generated.

Figure 66. CS Pin Characteristic with Different

Inductor Current

S(ZCD)

Operating

ZCD point

Best

ZCD

point

= I

L(ZCD)

> I

L(ZCD)

= 0

It is noted in Figure 66 and Equation 23 that when the

CS1

) term is smaller the error or distance between the

lines to the line I

= 0 is smaller. Therefore, the value of the

current sense resistor R

CS1

is also recommended to be as

small as possible to minimize the error in the zero current

detection.

Overcurrent Protection (OCP) in PFC Section

Overcurrent protection is reached when I

is larger than

S(OCP)

(200 mA typical). The offset voltage of the CS pin

is V

S(OCP)

(3.2 mV typical) in this condition. That is:

L(OCP)

S(OCP)

* V

S(OCP)

CS1

(eq. 24)

When overcurrent protection threshold is reached, the

Drive Output of the device goes low.

Oscillator/Synchronization Block in PFC Section

Figure 67. Oscillator / Synchronization Block

in PFC Section

Oscillator Clock

Zero Current

Turn on

MOSFET

5 V/3.5 V

Osc

delay

45 mA

94 mA

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